如何修改vim下vhdl语言语法文件
发表于 ： 2010-03-31 23:32
代码： 全选
" indent: follow indent of previous opening statement, otherwise -sw
" keyword: "begin"
" where: anywhere in current line
if curs =~? s:NC.'\<begin\>'
let ind = ind - &sw
" find previous opening statement of
" keywords: "architecture", "block", "entity", "function", "generate", "procedure", "process"
let s2 = s:NC.s:NE.'\<\%(architecture\|block\|entity\|function\|generate\|procedure\|process\)\>'
if (curs !~? s2.'.*'.s:NC.'\<begin\>.*'.s:ES && prevs =~? s2) || m == 1
let ind = ind + &sw
endif
return ind
endi代码： 全选
architecture rt1 of fenpin3 is
signal p,q:std_logic_vector(1 downto 0);
begin
process(clk)
begin
if(clk'event and clk='1')then
if p="10" then
p<="00";
else
p<=p+1;
end if;
end if;
end process;
process(clk)
begin
if(clk'event and clk='0') then
if q="10" then
q<="00";
else
q<=q+'1';
end if;
end if;
end process;
clk_out<='1' when p="00" or q="00" else
'0';
end rt1谁可以告诉下，感激不尽！！！