代码： 全选
$lspci |grep IDE
00:1f.1 IDE interface: Intel Corporation 82801G (ICH7 Family) IDE Controller (rev 01)
00:1f.2 IDE interface: Intel Corporation NM10/ICH7 Family SATA Controller [IDE mode] (rev 01)
$
183页:
Intel
CH7 Family Datasheet
183
Functional Description
5.16
IDE Controller (D31:F1)
The ICH7 IDE controller features one sets of interface signals that can be enabled, tri-
stated or driven low.
The IDE interfaces of the ICH7 can support several types of data transfers:
•
Programmed I/O (PIO):
Processor is in control of the data transfer.
•
8237 style DMA:
DMA protocol that resembles the DMA on the ISA bus, although
it does not use the 8237 in the ICH7. This
protocol off loads the processor from
moving data. This allows higher transfer rate of up to 16 MB/s.
•
Ultra ATA/33:
DMA protocol that redefines signals on the IDE cable to allow both
host and target throttling of data and transfer rates of up to 33 MB/s.
•
Ultra ATA/66:
DMA protocol that redefines signal
s on the IDE cable to allow both
host and target throttling of data and transfer rates of up to 66 MB/s.
•
Ultra ATA/100:
DMA protocol that redefines signals on the IDE cable to allow both
host and target throttling of data and transfer rates of up to 100 MB/s.